Microelectronic-Based Low Power techniques for microsystems and Neural Applications

SOCRATES Programme: 29438-IC-1-2002-ES-ERASMUS-IPUC-7

Dates of the intensive course

20th February to 1st Mars, 2004

Escola Tècnica Superior d'Enginyeria

Universitat Autònoma de Barcelona

contacting professors

Joan Oliver, Universitat Autònoma de Barcelona (Spain)

Denis Flandre, Université Catholique de Louvain (Belgium)

Andreas Kaiser, Université Catholique de Lille (France)

Maurizio Valle, Universita de Genova (Italy)

Abstract of the course

Microelectronic-Based Low Power Techniques for Microsystems and Neural Applications, is a new edition of an intensive program of a high-level course that introduces to last-year-pregaduated and postgraduated students how the latest low power microelectronic advances are applied into microsystems and neural-microelectronic applications . As the previous programs it will be held in Barcelona, in spring 2004. The main objectives of the program are:

- To introduce the latest low power microelectronic techniques advances.
- To present how neural-microelectronic applications can be used to help to reduce power consumption.
- To show microsystems applications as a need to look forward into new low power techniques research.
- And, of course, to gather students of different european countries interested in low power design techniques and applications to microsystems and neural systems.

The program of the course is in accordance to the studies that actullay are trained in the universities that apply to the project.

Program of the intensive course

Part 1. Professor: Denis Flandre
-MOST modelisation for low power low voltage (LPLV) applications.
- Bulk CMOS and SOI technologies.
- Gm/Id design methodology in LPLV operational amplifiers.

Part 2. Professor: Andreas Kaiser.
- LPLV techniques for analog circuits.
- Voltage and current mode AD / DA interfaces.

Part 3. Professor: Maurizio Valle.
- Neural networks: algorithms for pattern recognition. Analog architectures and implementations.
- On-chip analog implementation of supervised learning algorithms and exemples.

Part 4. Professors: Joan Oliver / Carles Ferrer
- Smart sensors and transducers for space applications.
- Data acquisition methods for sensor systems.
- Low power design techniques at software level for smart sensors design.

Students participant list:

Student list Socrates'04

And the photos of the course...

In the classroom
In the exterior

Course material:

Part 1: Denis Flandre	General Overview of SOI (Silicon-on-Insulator) technology Analog design with Gm/Id in bulk and SOI CMOS Harmonic distortion: MOSFET-C filters
Part 2: Andreas Kaiser	Very Low Voltage Analog Circuit design Rail to Rail Opamps
Part 3: Maurizio Valle	Introduction Neural Networks and Supervised Learning Algorithms Analog VLSI Neural Nertworks MOS-translinear-circuits Neural translinear primitive circuits On-chipWP On-chipBP Application1 Application2
Part 4a: Carles Ferrer	MEMS: Architecture & Design
Part 4b: Joan Oliver	Low Power Techinques in Digital Systems Adiabatic Circuits Processor Energy Efficiency Low Power Through Software Optimisation Interessant papers on adiabatic circuits Arsalan presentation. Good biomedical adiabatic logic circuit application. Hamid paper Athas paper

 

Location:

The course will be held in the Escola Tècnica Superior d'Enginyeria, at the Universitat Aurònoma de Barcelona.

Information about arrival to the ETSE can be found in the file location.pdf

Youth hostal location nformation: youth hostal