-- Multiplexor

-- Declaración de librerías
Library ieee;
Use ieee.std_logic_1164.ALL;
Use
ieee.std_logic_unsigned.ALL;

-- Declaración de la entidad
Entity multiplexor is
port (
x: in std_logic_vector(7 downto 0);
s: in std_logic_vector(2 downto 0);
z: out std_logic);

end multiplexor ;

-- Definición de la arquitectura
Architecture logica of multiplexor is

begin

z <= x(0) when s="000" else

x(1) when s="001" else
x(2) when s="010" else
x(3) when s="011" else
x(4) when s=4 else
x(5) when s=5 else
x(6) when s=6 else
x(7);

end logica;


WcN - Joan Oliver. Diseño de circuitos digitales con VHDL